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Achille BOSC
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Flagship project

Engine Controller

Rocket engine controller in C11, with no OS and no dynamic allocation, validated in Software-In-the-Loop.

The problem

A rocket engine controller drives a sequence where mistakes are not an option: ignite, hold a nominal regime, shut down cleanly, and cut off immediately if any value leaves its safe envelope. The software has to be deterministic (same input, same behaviour, same execution time) and verifiable before it ever touches hardware.

Engine sequence state machineIgnition, then nominal, then shutdown. From any of these states, a redline violation triggers abort.startIGNITIONNOMINALPID · fixed rateSHUTDOWNredlineredlineredlineABORT
Ignition, then nominal, then shutdown. From any of these states, a redline violation triggers abort.

What I built

  • Sequence state machine: ignition, nominal, shutdown, abort. Every transition is explicit; no state is ever reached "by accident".
  • Fixed-rate PID control: the control loop runs at a constant rate, which is what keeps the tuned gains valid.
  • Redlines with emergency shutdown: thresholds checked on every cycle; any violation forces the transition to abort, which takes priority over everything else.
  • Post-test telemetry: test data is kept for analysis after the run.
  • Software-In-the-Loop validation: the control code runs against a simulated engine model, so nominal runs and failures can be replayed with zero risk.
  • Testing on an STM32 emulator and unit tests to validate the code as it will run on target.

Design choices

Choice Why
C11, no OS Full control over execution flow and timing: no scheduler or hidden layer between the code and the hardware.
No dynamic allocation No malloc means no fragmentation and no allocation failure mid-flight: all memory is known at compile time (rule 3 of "Power of Ten").
NASA/JPL "Power of Ten" rules A proven framework for critical code: simple control flow, bounded loops, assertions, minimal data scope. The code stays analysable.
Explicit state machine Makes the sequence readable, testable state by state, and guarantees abort is always reachable.
SIL before hardware Like a flight simulator for a pilot: rehearse failures before they happen for real.

Skills demonstrated

Constrained embedded C, critical and real-time software design, control theory (PID), state-machine architecture, test strategy (unit, SIL, emulation), applying an industry coding standard.

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